https://openalex.org/T12495
This cluster of papers focuses on the design, analysis, and modeling of electrostatic discharge (ESD) protection in integrated circuits, particularly in CMOS technology. It covers topics such as SCR devices, LDMOS design, RF ESD protection, TLP calibration, high-voltage ESD solutions, and latchup immunity. The papers also discuss on-chip protection strategies and system-level ESD testing.
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rdfs:label "Electrostatic Discharge Protection in Integrated Circuits"@en ;
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skos:definition "This cluster of papers focuses on the design, analysis, and modeling of electrostatic discharge (ESD) protection in integrated circuits, particularly in CMOS technology. It covers topics such as SCR devices, LDMOS design, RF ESD protection, TLP calibration, high-voltage ESD solutions, and latchup immunity. The papers also discuss on-chip protection strategies and system-level ESD testing."@en ;
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skos:prefLabel "Electrostatic Discharge Protection in Integrated Circuits"@en ;
openalex:cited_by_count 113701 ;
openalex:works_count 19266 .