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Phase-Locked Loops in High-Speed Circuits leaf node

URI

https://openalex.org/T11417

Label

Phase-Locked Loops in High-Speed Circuits

Description

This cluster of papers focuses on the design, analysis, and optimization of phase-locked loops (PLLs) and related components in high-speed circuits. Topics include frequency synthesizers, time-to-digital converters, jitter analysis, digital PLLs, charge pumps, clock recovery techniques, delta-sigma modulators, and their application in high-speed communication systems.

Inherits from

  • Electrical and Electronic Engineering
  • Engineering
  • Physical Sciences

    • Implementation

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